/** ****************************************************************** * @file main.c * @author fire * @version V1.0 * @date 2019-xx-xx * @brief BDMA�������赽�洢��ģʽ ****************************************************************** * @attention * * ʵ��ƽ̨:Ұ�� STM32H750 ������ * ��̳ :http://www.firebbs.cn * �Ա� :http://firestm32.taobao.com * ****************************************************************** */ #include "stm32h7xx.h" #include "main.h" #include "./usart/bsp_debug_usart.h" #include "./adc/bsp_adc.h" #include "./delay/core_delay.h" extern __IO uint16_t ADC_ConvertedValue; float ADC_vol; //����ʱ���� static void Delay(__IO uint32_t nCount) { for(; nCount != 0; nCount--); } /** * @brief ������ * @param �� * @retval �� */ int main(void) { /* ϵͳʱ�ӳ�ʼ����480MHz */ SystemClock_Config(); /* Ĭ�ϲ����� MPU������Ҫ�������ܣ������� MPU ��ʹ�� DMA ʱ��ע�� Cache �� �ڴ�����һ���Ե����⣬ ����ע��������ο����̵̳� MPU ��������½� */ // Board_MPU_Config(0, MPU_Normal_WT, 0xD0000000, MPU_32MB); // Board_MPU_Config(1, MPU_Normal_WT, 0x24000000, MPU_512KB); // SCB_EnableICache(); // ʹ��ָ�� Cache // SCB_EnableDCache(); // ʹ������ Cache /* ���ô���1Ϊ��115200 8-N-1 */ DEBUG_USART_Config(); /* ADC��ʼ���ӳ��� */ ADC_Init(); while(1) { Delay(0xffffee); printf("\r\n The current AD value = 0x%04X \r\n", ADC_ConvertedValue); printf("\r\n The current AD value = %f V \r\n", ADC_vol); /* ADC�IJ���ֵ / ADC���� = ��ѹֵ / 3.3 */ ADC_vol = (float)(ADC_ConvertedValue*3.3/65536); } } /** * @brief System Clock ���� * system Clock ��������: * System Clock source = PLL (HSE) * SYSCLK(Hz) = 480000000 (CPU Clock) * HCLK(Hz) = 240000000 (AXI and AHBs Clock) * AHB Prescaler = 2 * D1 APB3 Prescaler = 2 (APB3 Clock 120MHz) * D2 APB1 Prescaler = 2 (APB1 Clock 120MHz) * D2 APB2 Prescaler = 2 (APB2 Clock 120MHz) * D3 APB4 Prescaler = 2 (APB4 Clock 120MHz) * HSE Frequency(Hz) = 25000000 * PLL_M = 5 * PLL_N = 192 * PLL_P = 2 * PLL_Q = 4 * PLL_R = 2 * VDD(V) = 3.3 * Flash Latency(WS) = 4 * @param None * @retval None */ /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 5; RCC_OscInitStruct.PLL.PLLN = 192; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { } } /****************************END OF FILE***************************/